RM0351
70/1693 DocID024597 Rev 3
APB1
0x4000 9800 - 0x4000 FFFF 26 KB Reserved -
0x4000 9400 - 0x4000 97FF 1 KB LPTIM2
Section 30.7.11: LPTIM register
map
0x4000 8C00 - 0x4000 93FF 2KB Reserved -
0x4000 8800 - 0x4000 8BFF 1 KB SWPMI1
Section 40.6.10: SWPMI
register map and reset value
table
0x4000 8400 - 0x4000 87FF 1KB Reserved -
0x4000 8000 - 0x4000 83FF 1 KB LPUART1
Section 37.7.10: LPUART
register map
0x4000 7C00 - 0x4000 7FFF 1 KB LPTIM1
Section 30.7.11: LPTIM register
map
0x4000 7800 - 0x4000 7BFF 1 KB OPAMP
Section 20.5.7: OPAMP register
map
0x4000 7400 - 0x4000 77FF 1 KB DAC1
Section 17.5.21: DAC register
map
0x4000 7000 - 0x4000 73FF 1 KB PWR
Section 5.4.24: PWR register
map and reset value table
0x4000 6800 - 0x4000 6FFF 1KB Reserved -
0x4000 6400 - 0x4000 67FF 1 KB CAN1
Section 42.9.5: bxCAN register
map
0x4000 6000 - 0x4000 63FF 1KB Reserved -
0x4000 5C00- 0x4000 5FFF 1 KB I2C3
Section 35.7.12: I2C register
map
0x4000 5800 - 0x4000 5BFF 1 KB I2C2
Section 35.7.12: I2C register
map
0x4000 5400 - 0x4000 57FF 1 KB I2C1
Section 35.7.12: I2C register
map
Table 1. STM32L4x6 memory map and peripheral register boundary addresses (continued)
Bus Boundary address Size (bytes) Peripheral Peripheral register map