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NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 732 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
Interrupt Program Status Register: The IPSR contains the exception type number of
the current Interrupt Service Routine (ISR). See the register summary in Table 626
for
its attributes. The bit assignments are:
Table 628. APSR bit assignments
Bits Name Function
[31] N Negative or less than flag:
0 = operation result was positive, zero, greater than, or equal
1 = operation result was negative or less than.
[30] Z Zero flag:
0 = operation result was not zero
1 = operation result was zero.
[29] C Carry or borrow flag:
0 = add operation did not result in a carry bit or subtract operation resulted in
a borrow bit
1 = add operation resulted in a carry bit or subtract operation did not result in
a borrow bit.
[28] V Overflow flag:
0 = operation did not result in an overflow
1 = operation resulted in an overflow.
[27] Q Sticky saturation flag:
0 = indicates that saturation has not occurred since reset or since the bit was
last cleared to zero
1 = indicates when an
SSAT
or
USAT
instruction results in saturation.
This bit is cleared to zero by software using an
MRS
instruction.
[26:0] - Reserved.

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