Power control (PWR) RM0444
130/1390 RM0444 Rev 5
Temperature sensor O O O O - ------
TIMx OOOO-
------
LPTIM1/2 OOOOOO-----
IWDG OOOOO
OOO- --
WWDG OOOO-
------
SysTick timer O O O O -
------
RNG
(9)
OOOO-------
AES OOOO-
------
CRC OOOO-
------
USB O O - - -
------
FDCAN1/2 O O - - -
------
GPIOs OOOOO
O
(10)
up to
5
pins
(11)
(12)
up to
5
pins
(11)
-
1. Legend: Y = Yes (Enable). O = Optional (Disable by default. Can be enabled by software). - = Not available.
2. The Flash can be configured in power-down mode. By default, it is not in power-down mode.
3. The SRAM clock can be gated ON or OFF.
4. SRAM content is preserved when the bit RRS is set in PWR_CR3 register.
5. Some peripherals with wakeup from Stop capability can request HSI16 to be enabled. In this case, HSI16 is woken up by
the peripheral, and only feeds the peripheral which requested it. HSI16 is automatically put OFF when the peripheral does
not need it anymore.
6. If CSS is used on HSE clock in Low power run or Low power sleep modes, configure HSIDIV such as not to drive SYSCLK
clock above the maximum frequency for either mode, in case of external clock failure detection.
7. USART and LPUART reception is functional in Stop mode, and generates a wakeup interrupt on Start, address match or
received frame event.
8. I2C address detection is functional in Stop mode, and generates a wakeup interrupt in case of address match.
9. Not functional in Range 2.
10. I/Os can be configured with internal pull-up, pull-down or floating in Standby mode.
11. I/Os with wakeup from Standby/Shutdown mode capability (WKUPx).
12. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode but the configuration is lost when
exiting Shutdown mode.
Table 26. Functionalities depending on the working mode
(1)
(continued)
Function Run Sleep
Low-power run
Low-power sleep
Stop 0/1 Standby Shutdown
VBAT
-
Wakeup capability
-
Wakeup capability
-
Wakeup capability
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