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ST STM32G0 1 Series

ST STM32G0 1 Series
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RM0444 Rev 5 165/1390
RM0444 Reset and clock control (RCC)
220
CEC, with these clock sources to select from:
HSI16 clock divided by 488
–LSE
RTC, with these clock sources to select from:
–LSE
–LSI
HSE clock divided by 32
The functionality in Stop mode (including wakeup) is supported only when the clock is
LSI or LSE.
IWDG, always clocked with LSI clock.
USB, with these clocks to select from:
–HSE
–HSI48
PLLQCLK
FDCAN, with these clocks to select from:
–HSE
–PCLK
PLLQCLK
SysTick (Cortex
®
core system timer), with these clock sources to select from:
HCLK (AHB clock)
HCLK clock divided by 8
The selection is done through SysTick control and status register.
HCLK is used as Cortex
®
-M0+ free-running clock (FCLK). For more details, refer to the
programming manual PM0223.

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