ST STM32G0 1 Series User Manual

RM0444 Rev 5 195/1390
RM0444 Reset and clock control (RCC)
220
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
ADC
RST
Res.
TIM17
RST
TIM16
RST
TIM15
RST
(1)
rw rw rw rw
1514131211109876543210
TIM14
RST
USART1
RST
Res.
SPI1
RST
TIM1
RST
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
SYS
CFG
RST
rw rw rw rw rw
1. Only significant on devices integrating the corresponding peripheral, otherwise reserved. Refer to Section 1.4: Availability
of peripherals.
Bits 31:21 Reserved, must be kept at reset value.
Bit 20 ADCRST: ADC reset
Set and cleared by software.
0: No effect
1: Reset ADC
Bit 19 Reserved, must be kept at reset value.
Bit 18 TIM17RST: TIM16 timer reset
Set and cleared by software.
0: No effect
1: Reset TIM17 timer
Bit 17 TIM16RST: TIM16 timer reset
Set and cleared by software.
0: No effect
1: Reset TIM16 timer
Bit 16 TIM15RST: TIM15 timer reset
(1)
Set and cleared by software.
0: No effect
1: Reset TIM15 timer
Bit 15 TIM14RST: TIM14 timer reset
Set and cleared by software.
0: No effect
1: Reset TIM14 timer
Bit 14 USART1RST: USART1 reset
Set and cleared by software.
0: No effect
1: Reset USART1
Bit 13 Reserved, must be kept at reset value.
Bit 12 SPI1RST: SPI1 reset
Set and cleared by software.
0: No effect
1: Reset SPI1

ST STM32G0 1 Series Specifications

General

Brand	ST
Model	STM32G0 1 Series
Category	Microcontrollers
Language	English