Analog-to-digital converter (ADC) RM0444
390/1390 RM0444 Rev 5
Bit 2 SCANDIR: Scan sequence direction
This bit is set and cleared by software to select the direction in which the channels is scanned
in the sequence. It is effective only if CHSELMOD bit is cleared to 0.
0: Upward scan (from CHSEL0 to CHSEL18)
1: Backward scan (from CHSEL18 to CHSEL0)
Note: The software is allowed to write this bit only when ADSTART bit is cleared to 0 (this
ensures that no conversion is ongoing).
If CCRDY is not yet asserted after channel configuration (writing ADC_CHSELR register
or changing CHSELRMOD or SCANDIR), the value written to this bit is ignored.
Bit 1 DMACFG: Direct memory access configuration
This bit is set and cleared by software to select between two DMA modes of operation and is
effective only when DMAEN = 1.
0: DMA one shot mode selected
1: DMA circular mode selected
For more details, refer to Section 15.5.5: Managing converted data using the DMA on
page 365
Note: The software is allowed to write this bit only when ADSTART bit is cleared to 0 (this
ensures that no conversion is ongoing).
Bit 0 DMAEN: Direct memory access enable
This bit is set and cleared by software to enable the generation of DMA requests. This allows
the DMA controller to be used to manage automatically the converted data. For more details,
refer to Section 15.5.5: Managing converted data using the DMA on page 365.
0: DMA disabled
1: DMA enabled
Note: The software is allowed to write this bit only when ADSTART bit is cleared to 0 (this
ensures that no conversion is ongoing).
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