Advanced-control timer (TIM1) RM0444
624/1390 RM0444 Rev 5
Refer to Section 2.2 on page 58 for the register boundary addresses.
0x58
TIM1_CCR5
GC5C3
GC5C2
GC5C1
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
CCR5[15:0]
Reset value
000 0000000000000000
0x5C
TIM1_CCR6
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
CCR6[15:0]
Reset value 0000000000000000
0x60
TIM1_AF1
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res
ETRSEL
[3:0]
Res.
BKCMP3P
(1)
BKCMP2P
BKCMP1P
BKINP
Res.
Res.
Res.
Res.
Res.
BKCMP3E
(1)
BKCMP2E
BKCMP1E
BKINE
Reset value
0000 0000 0001
0x64
TIM1_AF2
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
BK2CMP3P
(1)
BK2CMP2P
BK2CMP1P
BK2INP
Res.
Res.
Res.
Res.
Res.
BK2CMP3E
(1)
BK2CMP2E
BK2CMP1E
BK2INE
Reset value
0000 0001
0x68
TIM1_TISEL
Res.
Res.
Res.
Res.
TI4SEL[3:0]
Res.
Res.
Res.
Res.
TI3SEL[3:0]
Res.
Res.
Res.
Res.
TI2SEL[3:0]
Res.
Res.
Res.
Res.
TI1SEL[3:0]
Reset value 0000 0000 0000 0000
1. Available on STM32G0B1xx and STM32G0C1xx salestypes only.
Table 117. TIM1 register map and reset values (continued)
Offset
Register
name
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
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