Reset and clock control (RCC) RM0351
208/1693 DocID024597 Rev 3
Bit 15 Reserved, must be kept at reset value.
Bits 14:8 PLLSAI1N[6:0]: SAI1PLL multiplication factor for VCO
Set and cleared by software to control the multiplication factor of the VCO. These bits can be
written only when the SAI1PLL is disabled.
VCOSAI1 output frequency = VCOSAI1 input frequency x PLLSAI1N
with 8 =< PLLSAI1N =< 86
0000000: PLLSAI1N = 0 wrong configuration
0000001: PLLSAI1N = 1 wrong configuration
...
0000111: PLLSAI1N = 7 wrong configuration
0001000: PLLSAI1N = 8
0001001: PLLSAI1N = 9
...
1010101: PLLSAI1N = 85
1010110: PLLSAI1N = 86
1010111: PLLSAI1N = 87 wrong configuration
...
1111111: PLLSAI1N = 127 wrong configuration
Caution: The software has to set correctly these bits to ensure that the VCO output
frequency is between 64 and 344 MHz.
Bits 7:0 Reserved, must be kept at reset value.
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