RM0444 Rev 5 87/1390
RM0444 Embedded Flash memory (FLASH)
118
WRP2A address option bytes
Flash memory address: 0x1FFF 7848
Reset value: 0x0000 00FF (ST production value)
WRP2B address option bytes
Flash memory address: 0x1FFF 7850
Reset value: 0x0000 00FF (ST production value)
Bits 31:9 Reserved, must be kept at reset value.
Bits 8:0 PCROP2A_END[8:0]: PCROP2A area end offset, Bank 2
PCROP2A_END contains the offset of the last PCROP subpage of the PCROP2A area in
Bank 2 of dual-bank devices.
Note: Values corresponding to addresses outside the Main memory are not allowed.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. WRP2A_END[6:0]
rrrrr rr
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. WRP2A_STRT[6:0]
rrrrr rr
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:16 WRP2A_END[6:0]: WRP area A end offset, Bank 2
WRP2A_END contains the offset of the last page of the WRP area A in Bank 2 of dual-bank
devices.
Note: Values corresponding to addresses outside the Main memory are not allowed.
Bits 15:7 Reserved, must be kept at reset value.
Bits 6:0 WRP2A_STRT[6:0]: WRP area A start offset, Bank 2
WRP2A_STRT contains the offset of the first page of the WRP area A in BAnk 2 of dual-
bank devices.
Note: Values corresponding to addresses outside the Main memory are not allowed.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. WRP2B_END[6:0]
rrrrr rr
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. WRP2B_STRT[6:0]
rrrrr rr
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