ST STM32L4x6 User Manual

USB on-the-go full-speed (OTG_FS) RM0351
1550/1693 DocID024597 Rev 3
43.15.17 OTG Host periodic transmit FIFO size register
(OTG_HPTXFSIZ)
Address offset: 0x100
Reset value: 0x0200 0400
Bits 5:4 PRBPER: Probe period
These bits sets the T
ADPPRD
as follow:
00: 0.625 to 0.925 sec (typical 0.775 sec)
01: 1.25 to 1.85 sec (typical 1.55 sec)
10: 1.9 to 2.6 sec (typical 2.275 sec)
11: Reserved
Bits 3:2 PRBDELTA: Probe delta
These bits set the resolution for RTIM value. The bits are defined in units of 32 kHz clock
cycles as follow:
00: 1 cycle
01: 2 cycles
10: 3 cycles
11: 4 cycles
For example if this value is chosen to be 01, it means that RTIM increments for every two
32 kHz clock cycles.
Bits 1:0 PRBDSCHG: Probe discharge
These bits set the times for T
ADP_DSCHG
. These bits are defined as follow:
00: 4 ms
01: 8 ms
10: 16 ms
11: 32 ms
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
PTXFSIZ
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
PTXSA
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 PTXFD: Host periodic Tx FIFO depth
This value is in terms of 32-bit words.
Minimum value is 16
Bits 15:0 PTXSA: Host periodic Tx FIFO start address
This field configures the memory start address for periodic transmit FIFO RAM.

ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English