ST STM32L4x6 User Manual

Contents RM0351
40/1693 DocID024597 Rev 3
43.15.12 OTG general core configuration register (OTG_GCCFG) . . . . . . . . . 1542
43.15.13 OTG core ID register (OTG_CID) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1543
43.15.14 OTG core LPM configuration register (OTG_GLPMCFG) . . . . . . . . . 1544
43.15.15 OTG power down register (OTG_GPWRDN) . . . . . . . . . . . . . . . . . . 1548
43.15.16 OTG ADP timer, control and status register
(OTG_GADPCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1548
43.15.17 OTG Host periodic transmit FIFO size register
(OTG_HPTXFSIZ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1550
43.15.18 OTG device IN endpoint transmit FIFO size register
(OTG_DIEPTXFx) (x = 1..5 , where x is the
FIFO_number) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1551
43.15.19 Host-mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1551
43.15.20 OTG Host configuration register (OTG_HCFG) . . . . . . . . . . . . . . . . . 1551
43.15.21 OTG Host frame interval register (OTG_HFIR) . . . . . . . . . . . . . . . . . 1552
43.15.22 OTG Host frame number/frame time remaining register
(OTG_HFNUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1553
43.15.23 OTG_Host periodic transmit FIFO/queue status register
(OTG_HPTXSTS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1554
43.15.24 OTG Host all channels interrupt register (OTG_HAINT) . . . . . . . . . . 1555
43.15.25 OTG Host all channels interrupt mask register
(OTG_HAINTMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1555
43.15.26 OTG Host port control and status register (OTG_HPRT) . . . . . . . . . 1556
43.15.27 OTG Host channel-x characteristics register (OTG_HCCHARx)
(x = 0..11, where x = Channel_number) . . . . . . . . . . . . . . . . . . . . . . 1558
43.15.28 OTG Host channel-x interrupt register (OTG_HCINTx)
(x = 0..11, where x = Channel_number) . . . . . . . . . . . . . . . . . . . . . . 1560
43.15.29 OTG Host channel-x interrupt mask register (OTG_HCINTMSKx)
(x = 0..11, where x = Channel_number) . . . . . . . . . . . . . . . . . . . . . . 1561
43.15.30 OTG Host channel-x transfer size register (OTG_HCTSIZx)
(x = 0..11, where x = Channel_number) . . . . . . . . . . . . . . . . . . . . . . 1562
43.15.31 Device-mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1563
43.15.32 OTG device configuration register (OTG_DCFG) . . . . . . . . . . . . . . . 1563
43.15.33 OTG device control register (OTG_DCTL) . . . . . . . . . . . . . . . . . . . . 1564
43.15.34 OTG device status register (OTG_DSTS) . . . . . . . . . . . . . . . . . . . . . 1566
43.15.35 OTG device IN endpoint common interrupt mask register
(OTG_DIEPMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1567
43.15.36 OTG device OUT endpoint common interrupt mask register
(OTG_DOEPMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1568
43.15.37 OTG device all endpoints interrupt register (OTG_DAINT) . . . . . . . . 1568
43.15.38 OTG all endpoints interrupt mask register
(OTG_DAINTMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1569

ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English