A9.6 Snoop channel properties
The table shows the properties of the ACE channels.
Table A9-9 ACE channel properties
Property Value Comment
Snoop
acceptance
capability
8 The SCU can accept and process a maximum of eight snoop requests from the system. It counts
requests from the request being accepted on the AC channel to the response being accepted on the CR
channel.
Snoop latency Hit
When there is a hit in L2 cache, the best case for response and data is 13 processor cycles. When there
is a miss in L2 cache and a hit in L1 cache, the best case for response and data is 16 processor cycles.
Latencies can be higher if hazards occur or if there are not enough buffers to absorb requests.
Miss Best case six processor cycles when the SCU duplicate tags and L2 tags indicate the miss.
DVM
The cluster takes a minimum of six cycles to provide a response to DVM packets.
Snoop filter Supported
The cluster provides support for an external snoop filter in an interconnect. It indicates when clean lines
are evicted from the processor by sending Evict transactions on the write channel.
However there are some cases where incorrect software can prevent an Evict transaction from being
sent. Therefore you must ensure that you build any external snoop filter to handle a capacity overflow
that sends a back-invalidation to the processor if it runs out of storage.
Examples of cases where evicts are not produced include:
• Linefills that take external aborts.
• Store exclusives that fail.
• Mismatched aliases.
Supported
transactions
- All transactions described by the ACE protocols:
• Are accepted on the master interface from the system.
• Can be produced on the ACE master interface except:
— WriteUnique.
— WriteLineUnique.
— ReadNotSharedDirty.
— ReadClean.
Related information
Arm® AMBA® AXI and ACE Protocol Specification AXI3, AXI4, and AXI4-Lite, ACE and ACE-Lite
A9 ACE Master Interface
A9.6 Snoop channel properties
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
A9-122
Non-Confidential