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ARM Cortex-A35 User Manual

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C11.38 Resource Selection Control Registers 2-16
The TRCRSCTLRn characteristics are:
Purpose
Controls the trace resources.
There are eight resource pairs, the first pair is predefined as {0,1,pair=0} and having reserved
select registers. This leaves seven pairs to be implemented as programmable selectors.
Usage constraints
Accepts writes only when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
0
RES0
16 1520 19
INV
PAIRINV
22 21
SelectGroup
18
RES0
RES0
8 7
Figure C11-37 TRCRSCTLRn bit assignments
[31:22]
Reserved, RES0.
PAIRINV, [21]
Inverts the result of a combined pair of resources.
This bit is implemented only on the lower register for a pair of resource selectors.
INV, [20]
Inverts the selected resources:
0 Resource is not inverted.
1 Resource is inverted.
[19]
Reserved, RES0.
GROUP, [18:16]
Selects a group of resources. See the Arm
®
ETM Architecture Specification, ETMv4 for more
information.
[15:8]
Reserved, RES0.
SELECT, [7:0]
Selects one or more resources from the required group. One bit is provided for each resource
from the group.
The TRCRSCTLRn can be accessed through the external debug interface, offset 0x208-023C.
C11 ETM registers
C11.38 Resource Selection Control Registers 2-16
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-784
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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