A12.2 Memory map for the GIC CPU interface
The GIC CPU Interface is a memory-mapped interface. It is offset from PERIPHBASE.
If GICCDISABLE is asserted, the registers are not available.
Table A12-1 GIC memory map
Address range Functional block
0x00000-0x01FFF CPU Interface
0x02000-0x0FFFF Reserved
0x10000-0x10FFF Virtual Interface Control
0x11000-0x1FFFF Reserved
0x20000-0x21FFF Virtual CPU Interface
0x22000-0x2EFFF Reserved
0x2F000-0x30FFF Alias of Virtual CPU Interface
0x31000-0x3FFFF Reserved
Related information
B2.54 AArch64 Processor Feature Register 0, EL1 on page B2-450
B1.85 Processor Feature Register 1 on page B1-291
A12 GIC CPU Interface
A12.2 Memory map for the GIC CPU interface
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