EasyManuals Logo

ARM Cortex-A35 User Manual

Default Icon
894 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #143 background imageLoading...
Page #143 background image
A12.2 Memory map for the GIC CPU interface
The GIC CPU Interface is a memory-mapped interface. It is offset from PERIPHBASE.
If GICCDISABLE is asserted, the registers are not available.
Table A12-1 GIC memory map
Address range Functional block
0x00000-0x01FFF CPU Interface
0x02000-0x0FFFF Reserved
0x10000-0x10FFF Virtual Interface Control
0x11000-0x1FFFF Reserved
0x20000-0x21FFF Virtual CPU Interface
0x22000-0x2EFFF Reserved
0x2F000-0x30FFF Alias of Virtual CPU Interface
0x31000-0x3FFFF Reserved
Related information
B2.54 AArch64 Processor Feature Register 0, EL1 on page B2-450
B1.85 Processor Feature Register 1 on page B1-291
A12 GIC CPU Interface
A12.2 Memory map for the GIC CPU interface
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
A12-143
Non-Confidential

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ARM Cortex-A35 and is the answer not in the manual?

ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

Related product manuals