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ARM Cortex-A35 User Manual

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B3.5 VGIC Type Register
The GICH_VTR characteristics are:
Purpose
Holds information on number of priority bits, number of preemption bits, and number of List
Registers implemented.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See the register summary in B3.4 Virtual interface control register summary on page B3-563.
PRIbits
31 29 28 26 25 6 5 0
PREbits RES0 ListRegs
Figure B3-2 GICH_VTR bit assignments
PRIbits, [31:29]
Indicates the number of priority bits implemented, minus one:
0x4 Five bits of priority and 32 priority levels.
PREbits, [28:26]
Indicates the number of preemption bits implemented, minus one:
0x4 Five bits of preemption and 32 preemption levels.
[25:6]
Reserved, RES0.
ListRegs, [5:0]
Indicates the number of implemented List Registers, minus one:
0x3 Four List Registers.
B3 GIC registers
B3.5 VGIC Type Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B3-564
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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