ARM Cortex-A35 User Manual

B1.15 c12 registers
The processor can access different 32-bit wide system registers. Registers where CRn has the value
twelve are called c12 registers.
The following table shows the 32-bit wide system registers you can access when the processor is in
AArch32 state and the value of CRn is c12.
Table B1-14 c12 register summary
Op1 CRm Op2 Name Reset Description
0 c0 0 VBAR
0x00000000
B1.119 Vector Base Address Register on page B1-354.
0x00000000 is the secure reset value and UNK is the non-secure reset value.
1 MVBAR UNK
Monitor Vector Base Address Register. See the Arm
®
Architecture Reference
Manual Armv8, for Armv8-A architecture profile for more information.
2 RMR
0x00000000
B1.103 Reset Management Register on page B1-326.
c1 0 ISR UNK B1.90 Interrupt Status Register on page B1-299.
c8 0 ICC_IAR0 - Interrupt Acknowledge Register 0
1 ICC_EOIR0 - End Of Interrupt Register 0
2 ICC_HPPIR0 - Highest Priority Pending Interrupt Register 0
3 ICC_BPR0
0x00000002
Binary Point Register 0
4 ICC_AP0R0
0x00000000
Active Priorities 0 Register 0
c9 0 ICC_AP1R0
0x00000000
Active Priorities 1 Register 0
c11 1 ICC_DIR - Deactivate Interrupt Register
3 ICC_RPR - Running Priority Register
c12 0 ICC_IAR1 - Interrupt Acknowledge Register 1
1 ICC_EOIR1 - End Of Interrupt Register 1
2 ICC_HPPIR1 - Highest Priority Pending Interrupt Register 1
3 ICC_BPR1
0x00000003
Binary Point Register 1
This is the reset value in non-secure state. In secure state, the reset value is
0x00000002.
4 ICC_CTLR
0x00000400
Interrupt Control Register
5 ICC_SRE
0x00000000
System Register Enable Register
6 ICC_IGRPEN0
0x00000000
Interrupt Group Enable Register 0
7 ICC_IGRPEN1
0x00000000
Interrupt Group Enable Register 1
B1 AArch32 system registers
B1.15 c12 registers
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English