ARM Cortex-A35 User Manual

B1.24 AArch32 Address registers
The following table shows the address translation register and operations.
See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile for more
information.
Table B1-23 Address translation operations
Name CRn Op1 CRm Op2 Reset Width Description
PAR c7 0 c4 0
UNK 32-bit
B1.100 Physical Address Register on page B1-321
- 0 c7 - 64-bit
B1 AArch32 system registers
B1.24 AArch32 Address registers
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English