A3.1 Clocks
The Cortex‑A35 processor has a single clock input, CLKIN. All cores in the Cortex‑A35 processor and
the SCU are clocked with a distributed version of CLKIN.
The Cortex‑A35 processor has the following clock enable signals:
• PCLKENDBG.
• ACLKENM.
• ACLKENS.
• SCLKEN.
• ATCLKEN.
• CNTCLKEN.
For more information, see the Arm
®
Cortex
®
‑
A35 Processor Integration Manual.
A3 Clocks, Resets, and Input Synchronization
A3.1 Clocks
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