C11.16 ViewInst Start-Stop Control Register
The TRCVISSCTLR characteristics are:
Purpose
Defines the single address comparators that control the ViewInst Start/Stop logic.
Usage constraints
• You must always program this register as part of trace unit initialization.
• Accepts writes only when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
0
RES0 STOP
16 15
RES0
8
START
2324 7
Figure C11-15 TRCVISSCTLR bit assignments
[31:24]
Reserved, RES0.
STOP, [23:16]
Defines the single address comparators to stop trace with the ViewInst Start/Stop control.
One bit is provided for each implemented single address comparator.
[15:8]
Reserved, RES0.
START, [7:0]
Defines the single address comparators to start trace with the ViewInst Start/Stop control.
One bit is provided for each implemented single address comparator.
The TRCVISSCTLR can be accessed through the external debug interface, offset 0x088.
C11 ETM registers
C11.16 ViewInst Start-Stop Control Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-754
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