C8.5 External Debug Device ID Register 1
The EDDEVID1 characteristics are:
Purpose
Provides extra information for external debuggers about features of the debug implementation.
Usage constraints
This register is accessible as follows:
Off DLK OSLK EDAD SLK Default
- - - - - RO
Table C1-1 Conditions on external register access to debug registers on page C1-579 describes
the condition codes.
Configurations
The EDDEVID1 is in the Debug power domain.
Attributes
See C8.1 Memory-mapped debug register summary on page C8-644.
31
0
RES0
34
PCSROffset
Figure C8-4 EDDEVID1 bit assignments
[31:4]
Reserved, RES0.
PCSROffset, [3:0]
Indicates the offset applied to PC samples returned by reads of EDPCSR:
0x2 EDPCSR samples have no offset applied and do not sample the instruction set state in
AArch32 state.
The EDDEVID1 can be accessed through the external debug interface, offset 0xFC4.
C8 Memory-mapped debug registers
C8.5 External Debug Device ID Register 1
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C8-652
Non-Confidential
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