B1.25 AArch32 Thread registers
The following table shows the miscellaneous operations.
See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile for more
information.
Table B1-24 Miscellaneous System instructions
Name CRn Op1 CRm Op2 Reset Description
TPIDRURW c13 0 c0 2 UNK
User Read/Write Thread ID Register
TPIDRURO 3 UNK
User Read-Only Thread ID Register
TPIDRPRW 4 UNK
EL1 only Thread ID Register
HTPIDR 4 c0 2 UNK
Hyp Software Thread ID Register
B1 AArch32 system registers
B1.25 AArch32 Thread registers
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