ARM Cortex-A35 User Manual

C11.20 External Input Select Register
The TRCEXTINSELR characteristics are:
Purpose
Controls the selectors that choose an external input as a resource in the ETM trace unit. You can
use the Resource Selectors to access these external input resources.
Usage constraints
Accepts writes only when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
08 716 1524 23
SEL2 SEL1 SEL0SEL3
2829
RES0 RES0
2021
RES0
1213
RES0
45
Figure C11-19 TRCEXTINSELR bit assignments
[31:29]
Reserved, RES0.
SEL3, [28:24]
Selects an event from the external input bus for External Input Resource 3.
[23:21]
Reserved, RES0.
SEL2, [20:16]
Selects an event from the external input bus for External Input Resource 2.
[15:13]
Reserved, RES0.
SEL1, [12:8]
Selects an event from the external input bus for External Input Resource 1.
[7:5]
Reserved, RES0.
SEL0, [4:0]
Selects an event from the external input bus for External Input Resource 0.
The TRCEXTINSELR can be accessed through the external debug interface, offset 0x120.
C11 ETM registers
C11.20 External Input Select Register
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English