ARM Cortex-A35 User Manual

C3.4 Programming and reading ETM trace unit registers
You program and read the ETM trace unit registers using the Debug APB interface.
The processor does not have to be in the debug state while you program the ETM trace unit registers.
When you are programming the ETM trace unit registers, you must enable all the changes at the same
time. Otherwise if you reprogram the counter, it might start to count based on incorrect events before the
correct setup is in place for the trigger condition.
To disable the ETM trace unit, use the TRCPRGCTLR.EN bit.
Start
Set main enable bit in
TRCPRGCTLR to 0b0
Read TRCSTATR
Is TRCSTATR Idle
0b1?
Program all trace
registers required
Set main enable bit in
TRCPRGCTLR to 0b1
Is TRCSTATR Idle
0b0?
End
Yes
Yes
No
No
Read TRCSTATR
Figure C3-2 Programming ETM trace unit registers
Related information
C11.2 Programming Control Register on page C11-736
C11.3 Status Register on page C11-737
C3 ETM
C3.4 Programming and reading ETM trace unit registers
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C3-601
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English