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ARM Cortex-A35 User Manual

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C9.14 ROM Table Component Identification Register 1
The ROMCIDR1 characteristics are:
Purpose
Provides information to identify an external debug component.
Usage constraints
This register is accessible as follows:
Off DLK OSLK EDAD SLK Default
- - - - - RO
C1.4 External access permissions to debug registers on page C1-579 describes the condition
codes.
Configurations
The ROMCIDR1 is in the Debug power domain.
Attributes
See C9.3 ROM table register summary on page C9-672.
RES0
31 0
PRMBL_1
78 34
CLASS
Figure C9-8 ROMCIDR1 bit assignments
[31:8]
Reserved, RES0.
CLASS, [7:4]
0x1 Component Class. For a ROM table.
PRMBL_1, [3:0]
0x0 Preamble.
The ROMCIDR1 can be accessed through the external debug interface, offset 0xFF4.
C9 ROM table
C9.14 ROM Table Component Identification Register 1
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C9-686
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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