C11.52 Integration Instruction ATB In Register
The TRCITIATBINR characteristics are:
Purpose
Reads the state of the input pins shown in the following table.
Usage constraints
• Available when bit[0] of TRCITCTRL is set to 1.
• The values of the register bits depend on the signals on the input pins when the register is
read.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 0
AFVALIDM
Reserved
2 1
ATREADYM
Figure C11-51 TRCITIATBINR bit assignments
For all non-reserved bits:
• When an input pin is LOW, the corresponding register bit is 0.
• When an input pin is HIGH, the corresponding register bit is 1.
• The TRCITIATBINR bit values always correspond to the physical state of the input pins.
[31:2]
Reserved. Read undefined.
AFVALIDM, [1]
Returns the value of the AFVALIDMn input pin.
ATREADYM, [0]
Returns the value of the ATREADYMn input pin.
The TRCITIATBINR can be accessed through the external debug interface, offset 0xEF4.
C11 ETM registers
C11.52 Integration Instruction ATB In Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-799
Non-Confidential
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