ARM Cortex-A35 User Manual

C11.35 ID Register 3
The TRCIDR3 characteristics are:
Purpose
Indicates:
• Whether TRCVICTLR is supported.
• The number of cores available for tracing.
• If an exception level supports instruction tracing.
• The minimum threshold value for instruction trace cycle counting.
• Whether the synchronization period is fixed.
• Whether TRCSTALLCTLR is supported and if so whether it supports trace overflow
prevention and supports stall control of the processor.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 025 24 16 15 1112 5 4
CCITMIN
30 28 20 19
RES0
2327 26
EXLEVEL_S
EXLEVEL_NS
NOOVERFLOW
NUMPROC
SYSSTALL
STALLCTL
SYNCPR
TRCERR
Figure C11-34 TRCIDR3 bit assignments
NOOVERFLOW, [31]
Indicates whether TRCSTALLCTLR.NOOVERFLOW is implemented:
0 TRCSTALLCTLR.NOOVERFLOW is not implemented.
NUMPROC, [30:28]
Indicates the number of cores available for tracing:
0b000 The trace unit can trace one processor, ETM trace unit sharing not supported.
SYSSTALL, [27]
Indicates whether stall control is implemented:
1 The system supports processor stall control.
STALLCTL, [26]
Indicates whether TRCSTALLCTLR is implemented:
1 TRCSTALLCTLR is implemented.
This field is used in conjunction with SYSSTALL.
C11 ETM registers
C11.35 ID Register 3
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C11-778
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English