ARM Cortex-A35 User Manual

C11.24 Counter Value Registers 0-1
The TRCCNTVRn characteristics are:
Purpose
Contains the current counter value.
Usage constraints
• Can be written only when the ETM trace unit is disabled.
• The count value is stable only when TRCSTATR.PMSTABLE==1.
• If software uses counter <n>, then it must write to this register to set the initial counter value.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
16 15 0
RES0 VALUE
Figure C11-23 TRCCNTVRn bit assignments
[31:16]
Reserved, RES0.
VALUE, [15:0]
Contains the current counter value.
The TRCCNTVRn registers can be accessed through the external debug interface, offsets:
TRCCNTVR0
0x160.
TRCCNTVR1
0x164.
C11 ETM registers
C11.24 Counter Value Registers 0-1
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C11-765
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English