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ARM Cortex-A35

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C11.33 ID Register 1
The TRCIDR1 characteristics are:
Purpose
Returns the base architecture of the trace unit.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 0
RES0
TRCARCHMAJ
24 23 16 15 12 11 8 7 4 3
RES1DESIGNER REVISION
TRCARCHMIN
Figure C11-32 TRCIDR1 bit assignments
DESIGNER, [31:24]
Indicates which company designed the trace unit:
0x41 Arm.
[23:16]
Reserved, RES0.
[15:12]
Reserved, RES1.
TRCARCHMAJ, [11:8]
Major trace unit architecture version number:
0b0100 ETMv4.
TRCARCHMIN, [7:4]
Minor trace unit architecture version number:
0b0000 Minor revision 0.
REVISION, [3:0]
Implementation revision number:
0x3 r1p0.
The TRCIDR1 can be accessed through the external debug interface, offset 0x1E4.
C11 ETM registers
C11.33 ID Register 1
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-775
Non-Confidential

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