C8.7 External Debug Feature Register
The EDDFR characteristics are:
Purpose
Provides top level information about the debug system in AArch64.
Usage constraints
This register is accessible as follows:
Default
RO
Configurations
External register EDDFR is architecturally mapped to the AArch64 ID_AA64DFR0_EL1
register. See B2.51 AArch64 Debug Feature Register 0, EL1 on page B2-444.
EDDFR is in the Debug power domain.
Attributes
EDDFR is a 64-bit register.
4 38 712 1116 1520 1924 2328 27
063
RES0 RES0 DebuggerTraceverPMUverBRPsWRPsCTX_CMPsRES0
32 31
Figure C8-6 EDDFR bit assignments
[63:32]
Reserved, RES0.
CTX_CMPs, [31:28]
Number of breakpoints that are context-aware, minus 1. These are the highest numbered
breakpoints.
[27:24]
Reserved, RES0.
WRPs, [23:20]
Number of watchpoints, minus 1. The value of 0b0000 is reserved.
[19:16]
Reserved, RES0.
BRPs, [15:12]
Number of breakpoints, minus 1. The value of 0b0000 is reserved.
PMUVer, [11:8]
Performance Monitors extension version. Indicates whether system register interface to
Performance Monitors extension is implemented. Defined values are:
0x0000 Performance Monitors extension system registers not implemented.
0x0001 Performance Monitors extension system registers implemented, PMUv3.
0x1111
1
IMPLEMENTATION DEFINED form of performance monitors supported, PMUv3 not
supported.
C8 Memory-mapped debug registers
C8.7 External Debug Feature Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C8-655
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