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ARM Cortex-A35 User Manual

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C11.49 Context ID Comparator Control Register 0
The TRCCIDCCTLR0 characteristics are:
Purpose
Controls the mask value for the context ID comparators.
Usage constraints
Accepts writes only when the trace unit is disabled.
If software uses the TRCCIDCVRn registers, where n=0 to 3, then it must program this
register.
If software sets a mask bit to 1 then it must program the relevant byte in TRCCIDCVRn to
0x00.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
0
RES0
4
COMP0
3
Figure C11-48 TRCCIDCCTLR0 bit assignments
[31:4]
Reserved, RES0.
COMP0, [3:0]
Controls the mask value that the trace unit applies to TRCCIDCVR0. Each bit in this field
corresponds to a byte in TRCCIDCVR0. When a bit is:
0 The trace unit includes the relevant byte in TRCCIDCVR0 when it performs the Context ID
comparison.
1 The trace unit ignores the relevant byte in TRCCIDCVR0 when it performs the Context ID
comparison.
The TRCCIDCCTLR0 can be accessed through the external debug interface, offset 0x680.
C11 ETM registers
C11.49 Context ID Comparator Control Register 0
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-796
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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