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ARM Cortex-A35 User Manual

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Chapter C9
ROM table
This chapter describes the ROM table that debuggers can use to determine which components are
implemented. It also describes the ROM table registers.
It contains the following sections:
C9.1 About the ROM table on page C9-670.
C9.2 ROM table register interface on page C9-671.
C9.3 ROM table register summary on page C9-672.
C9.4 ROM entry registers on page C9-673.
C9.5 ROM Table Peripheral Identification Registers on page C9-677.
C9.6 ROM Table Peripheral Identification Register 0 on page C9-678.
C9.7 ROM Table Peripheral Identification Register 1 on page C9-679.
C9.8 ROM Table Peripheral Identification Register 2 on page C9-680.
C9.9 ROM Table Peripheral Identification Register 3 on page C9-681.
C9.10 ROM Table Peripheral Identification Register 4 on page C9-682.
C9.11 ROM Table Peripheral Identification Register 5-7 on page C9-683.
C9.12 ROM Table Component Identification Registers on page C9-684.
C9.13 ROM Table Component Identification Register 0 on page C9-685.
C9.14 ROM Table Component Identification Register 1 on page C9-686.
C9.15 ROM Table Component Identification Register 2 on page C9-687.
C9.16 ROM Table Component Identification Register 3 on page C9-688.
100236_0100_00_en
Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C9-669
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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