ARM Cortex-A35 User Manual

C12.3 CTI Device Identification Register
The CTIDEVID characteristics are:
Purpose
Describes the CTI component to the debugger.
Usage constraints
The accessibility of CTIDEVID by condition code is:
Off DLK OSLK EDAD SLK Default
- - - - RO RO
C12.2 External register access permissions to the CTI registers on page C12-828 describes the
condition codes.
Configurations
CTIDEVID is in the Debug power domain.
Attributes
See the register summary in C12.1 Cross trigger register summary on page C12-826.
31 0
NUMCHAN
15 14 13
INOUT
4
7 6 5816212223242526
RES0
RES0 NUMTRIG EXTMAXNUMRES0RES0
Figure C12-1 CTIDEVID bit assignments
[31:26]
Reserved, RES0.
INOUT, [25:24]
Input and output options. Indicates the presence of an input gate. The possible values are:
0b00 CTIGATE does not mask propagation of input events from external channels.
0b01 CTIGATE masks propagation of input events from external channels.
[23:22]
Reserved, RES0.
NUMCHAN, [21:16]
Number of channels implemented. This value is:
0b00100 Four channels implemented.
[15:14]
Reserved, RES0.
NUMTRIG, [13:8]
Number of triggers implemented. This value is:
0b01000 Eight triggers implemented.
[7:5]
Reserved, RES0.
EXTMAXNUM, [4:0]
C12 CTI registers
C12.3 CTI Device Identification Register
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reserved.
C12-829
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English