C11.42 OS Lock Status Register
The TRCOSLSR characteristics are:
Purpose
Returns the status of the OS Lock.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 1 0
RES0
OSLM[1]
3 24
nTT
OSLK
OSLM[0]
Figure C11-41 TRCOSLSR bit assignments
[31:4]
TRCRSCTLRn
OSLM[1], [3]
OS Lock model [1] bit. This bit is combined with OSLM[0] to form a two-bit field that indicates
the OS Lock model is implemented.
The value of this field is always 0b10, indicating that the OS Lock is implemented.
nTT, [2]
This bit is RAZ, that indicates that software must perform a 32-bit write to update the
TRCOSLAR.
OSLK, [1]
OS Lock status bit:
0 OS Lock is unlocked.
1 OS Lock is locked.
OSLM[0], [0]
OS Lock model [0] bit. This bit is combined with OSLM[1] to form a two-bit field that indicates
the OS Lock model is implemented.
The value of this field is always 0b10, indicating that the OS Lock is implemented.
The TRCOSLSR can be accessed through the external debug interface, offset 0x304.
C11 ETM registers
C11.42 OS Lock Status Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-788
Non-Confidential
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