ARM Cortex-A35

B2.69 Instruction Fault Status Register, EL2
The IFSR32_EL2 characteristics are:
Purpose
Allows access to the AArch32 IFSR register from AArch64 state only. Its value has no effect on
execution in AArch64 state.
Usage constraints
This register is accessible as follows:
EL0 EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
- - - RW RW RW
Configurations
IFSR32_EL2 is architecturally mapped to AArch32 register IFSR(NS). See B1.87 Instruction
Fault Status Register on page B1-294.
Attributes
IFSR32_EL2 is a 32-bit register.
There are two formats for this register. The current translation table format determines which format of
the register is used.
B2 AArch64 system registers
B2.69 Instruction Fault Status Register, EL2
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