C11.15 ViewInst Include-Exclude Control Register
The TRCVIIECTLR characteristics are:
Purpose
Defines the address range comparators that control the ViewInst Include/Exclude control.
Usage constraints
• You must always program this register as part of trace unit initialization.
• Accepts writes only when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
0
RES0 EXCLUDE
16 15
RES0 INCLUDE
1920 34
Figure C11-14 TRCVIIECTLR bit assignments
[31:20]
Reserved, RES0.
EXCLUDE, [19:16]
Defines the address range comparators for ViewInst exclude control. One bit is provided for
each implemented Address Range Comparator.
[15:4]
Reserved, RES0.
INCLUDE, [3:0]
Defines the address range comparators for ViewInst include control.
Selecting no include comparators indicates that all instructions must be included. The exclude
control indicates which ranges must be excluded.
One bit is provided for each implemented Address Range Comparator.
The TRCVIIECTLR can be accessed through the external debug interface, offset 0x084.
C11 ETM registers
C11.15 ViewInst Include-Exclude Control Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-753
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