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ARM Cortex-A35 User Manual

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C11.62 Device Architecture Register
The TRCDEVARCH characteristics are:
Purpose
Identifies the ETM trace unit as an ETMv4 component.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
ARCHITECT
31 21 20 19 16 15 0
REVISION ARCHID
PRESENT
Figure C11-60 TRCDEVARCH bit assignments
ARCHITECT, [31:21]
Defines the architect of the component:
0x4 Arm JEP continuation.
0x3B Arm JEP 106 code.
PRESENT, [20]
Indicates the presence of this register:
0b1 Register is present.
REVISION, [19:16]
Architecture revision:
0b0000 Architecture revision 0.
ARCHID, [15:0]
Architecture ID:
0x4A13 ETMv4 component.
The TRCDEVARCH can be accessed through the external debug interface, offset 0xFBC.
C11 ETM registers
C11.62 Device Architecture Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-810
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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