ARM Cortex-A35 User Manual

C11.46 Address Comparator Access Type Registers 0-7
The TRCACATRn characteristics are:
Purpose
Controls the access for the corresponding address comparators.
Usage constraints
• Accepts writes only when the trace unit is disabled.
• If software uses two single address comparators as an address range comparator then it must
program the corresponding TRCACATR registers with identical values in the following
fields:
— TYPE
— CONTEXTTYPE
— EXLEVEL_S
— EXLEVEL_NS
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
RES0
63 16 15 12 11 8 7 3 2 1 0
RES0 TYPE
EXLEVEL_S
CONTEXTTYPEEXLEVEL_NS
Figure C11-45 TRCACATRn bit assignments
[63:16]
Reserved, RES0.
EXLEVEL_NS, [15:12]
Each bit controls whether a comparison can occur in Non-secure state for the corresponding
exception level. The possible values are:
0 The trace unit can perform a comparison, in Non-secure state, for exception level n.
1 The trace unit does not perform a comparison, in Non-secure state, for exception level
n.
The exception levels are:
Bit[12] Exception level 0.
Bit[13] Exception level 1.
Bit[14] Exception level 2.
Bit[15] Always RES0.
EXLEVEL_S, [11:8]
Each bit controls whether a comparison can occur in Secure state for the corresponding
exception level. The possible values are:
0 The trace unit can perform a comparison, in Secure state, for exception level n.
1 The trace unit does not perform a comparison, in Secure state, for exception level n.
The exception levels are:
C11 ETM registers
C11.46 Address Comparator Access Type Registers 0-7
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English