ARM Cortex-A35 User Manual

C11.21 Counter Reload Value Registers 0-1
The TRCCNTRLDVRn characteristics are:
Purpose
Defines the reload value for the counter.
Usage constraints
Accepts writes only when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
16 15 0
RES0 VALUE
Figure C11-20 TRCCNTRLDVRn bit assignments
[31:16]
Reserved, RES0.
VALUE, [15:0]
Defines the reload value for the counter. This value is loaded into the counter each time the
reload event occurs.
The TRCCNTRLDVRn registers can be accessed through the external debug interface, offsets:
TRCCNTRLDVR0
0x140.
TRCCNTRLDVR1
0x144.
C11 ETM registers
C11.21 Counter Reload Value Registers 0-1
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English