EasyManuals Logo

ARM Cortex-A35 User Manual

Default Icon
894 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #747 background imageLoading...
Page #747 background image
C11.10 Global Timestamp Control Register
The TRCTSCTLR characteristics are:
Purpose
Controls the insertion of global timestamps in the trace streams. When the selected event is
triggered, the trace unit inserts a global timestamp into the trace streams. The event is selected
from one of the Resource Selectors.
Usage constraints
Accepts writes only when the trace unit is disabled.
Must be programmed if TRCCONFIGR.TS==1.
Configurations
Available in all configurations.
Attributes
TRCTSCTLR is a 32-bit RW trace register.
The register is set to an UNKNOWN value on a trace unit reset. See also C11.1 ETM register
summary on page C11-733.
31 0
RES0
8 7
SEL
36 4
RES0
TYPE
Figure C11-9 TRCTSCTLR bit assignments
[31:8]
Reserved, RES0
TYPE, [7]
Single or combined resource selector.
[6:4]
Reserved.
SEL, [3:1]
Identifies the resource selector to use.
The TRCTSCTLR can be accessed through the external debug interface, offset 0x030.
C11 ETM registers
C11.10 Global Timestamp Control Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-747
Non-Confidential

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ARM Cortex-A35 and is the answer not in the manual?

ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

Related product manuals