ARM Cortex-A35 User Manual

B1.89 IFSR with Long-descriptor translation table format
IFSR has a specific format when using the Long-descriptor translation table format.
The following figure shows the IFSR bit assignments when using the Long-descriptor translation table
format.
31 13 12 11 10 9 8 5 0
RES0 1
ExT
RES0 Status
6
RES0
Figure B1-43 IFSR bit assignments for Long-descriptor translation table format
[31:13]
Reserved, RES0.
ExT,[12]
External abort type. This field indicates whether an AXI Decode or Slave error caused an abort:
0 External abort marked as DECERR.
1 External abort marked as SLVERR.
For aborts other than external aborts this bit always returns 0.
[11:10]
Reserved, RES0.
[9]
RAO.
[8:6]
Reserved, RES0.
Status,[5:0]
Fault Status bits. This field indicates the type of exception generated. Any encoding not listed is
reserved.
0b000000 Address size fault in TTBR0 or TTBR1.
0b0001LL Translation fault, LL bits indicate level.
0b0010LL Access fault flag, LL bits indicate level.
0b0011LL Permission fault, LL bits indicate level.
0b010000 Synchronous external abort.
0b0101LL Synchronous external abort on translation table walk, LL bits indicate level.
0b011000 Synchronous parity error on memory access.
0b0111LL Synchronous parity error on memory access on translation table walk, LL bits
indicate level.
0b100001 Alignment fault.
0b100010 Debug event.
0b110000 TLB conflict abort.
B1 AArch32 system registers
B1.89 IFSR with Long-descriptor translation table format
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English