ARM Cortex-A35 User Manual

C11.4 Trace Configuration Register
The TRCCONFIGR characteristics are:
Purpose
Controls the tracing options.
Usage constraints
• This register must always be programmed as part of trace unit initialization.
• Only accepts writes when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
TRCCONFIGR is a 32-bit RW trace register.
See C11.1 ETM register summary on page C11-733.
31 0
RES0
RS
12 11 10 8 67 5 4 3 2
TS
VMID
CID
RES0
CCI
BB
13 1
RES1
RES0 RES0
Figure C11-3 TRCCONFIGR bit assignments
[31:13]
Reserved, RES0.
RS, [12]
Enables the return stack. The possible values are:
0 Disables the return stack.
1 Enables the return stack.
TS, [11]
Enables global timestamp tracing. The possible values are:
0 Disables global timestamp tracing.
1 Enables global timestamp tracing.
[10:8]
Reserved, RES0.
VMID, [7]
Enables VMID tracing. The possible values are:
0 Disables VMID tracing.
1 Enables VMID tracing.
CID, [6]
Enables context ID tracing. The possible values are:
0 Disables context ID tracing.
1 Enables context ID tracing.
C11 ETM registers
C11.4 Trace Configuration Register
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reserved.
C11-738
Non-Confidential

ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English