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ARM Cortex-A35 User Manual

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C11.32 ID Register 0
The TRCIDR0 characteristics are:
Purpose
Returns the tracing capabilities of the ETM trace unit.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 0
RES0
COMMOPT
5 4 3 2 110 9 8 7 613 12 111415161724 2330 29 28
TSSIZE
RES0
RETSTACK
NUMEVENT
QFILT
QSUPP
CONDTYPE
INSTP0
RES1
TRCDATA
TRCBB
TRCCOND
TRCCCI
RES0
Figure C11-31 TRCIDR0 bit assignments
[31:30]
Reserved, RES0.
COMMOPT, [29]
Indicates the meaning of the commit field in some packets:
1 Commit mode 1.
TSSIZE, [28:24]
Global timestamp size field:
0b01000 Implementation supports a maximum global timestamp of 64 bits.
[23:17]
Reserved, RES0.
QSUPP, [16:15]
Indicates Q element support:
0b00 Q elements not supported.
QFILT, [14]
Indicates Q element filtering support:
0b0 Q element filtering not supported.
CONDTYPE, [13:12]
Indicates how conditional results are traced:
0b00 Conditional trace not supported.
NUMEVENT, [11:10]
C11 ETM registers
C11.32 ID Register 0
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-773
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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