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ARM Cortex-A35 User Manual

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C11.50 Integration ATB Identification Register
The TRCITATBIDR characteristics are:
Purpose
Sets the state of output pins shown in the following table.
Usage constraints
Available when bit[0] of TRCITCTRL is set to 1.
The value of the register sets the signals on the output pins when the register is written.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
IDReserved
31 07 6
Figure C11-49 TRCITATBIDR bit assignments
[31:7]
Reserved. Read undefined.
ID, [6:0]
Drives the ATIDMn[6:0] output pins.
When a bit is set to 0, the corresponding output pin is LOW.
When a bit is set to 1, the corresponding output pin is HIGH.
The TRCITATBIDR bit values correspond to the physical state of the output pins.
The TRCITATBIDR can be accessed through the external debug interface, offset 0xEE4.
C11 ETM registers
C11.50 Integration ATB Identification Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-797
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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