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ARM Cortex-A35 User Manual

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B2.4 AArch64 Virtual memory control registers
The following table shows the virtual memory control registers in AArch64 state.
Bits[63:32] are reset to 0x00000000 for all 64-bit registers in the table.
Table B2-3 AArch64 virtual memory control registers
Name Type Reset Width Description
SCTLR_EL1 RW
0x00C50838
32
B2.90 System Control Register, EL1 on page B2-525
The reset value depends on primary inputs CFGTE and CFGEND.
The value listed here assumes these signals are LOW.
SCTLR_EL2 RW
0x30C50838
32
B2.91 System Control Register, EL2 on page B2-529
The reset value depends on primary inputs CFGTE, CFGEND and
VINITHI. The value listed here assumes these signals are LOW.
SCTLR_EL3 RW 0x00C50838    32
B2.92 System Control Register, EL3 on page B2-532
The reset value depends on primary inputs CFGTE, CFGEND and
VINITHI. The value listed here assumes these signals are LOW.
TTBR0_EL1 RW UNK 64
B2.97 Translation Table Base Register 0, EL1 on page B2-546
TTBR1_EL1 RW UNK 64 B2.98 Translation Table Base Register 1, EL1 on page B2-548
TCR_EL1 RW UNK 64 B2.94 Translation Control Register, EL1 on page B2-536
TTBR0_EL2 RW UNK 64
Translation Table Base Address Register 0, EL2
See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A
architecture profile.
TCR_EL2 RW UNK 32 B2.95 Translation Control Register, EL2 on page B2-540
VTTBR_EL2 RW UNK 64
Virtualization Translation Table Base Address Register, EL2 
See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A
architecture profile.
VTCR_EL2 RW UNK 32 B2.105 Virtualization Translation Control Register, EL2
on page B2-556
TTBR0_EL3 RW UNK 64 B2.99 Translation Table Base Register 0, EL3 on page B2-550
TCR_EL3 RW UNK 32 B2.96 Translation Control Register, EL3 on page B2-543
MAIR_EL1 RW UNK 64 B2.77 Memory Attribute Indirection Register, EL1 on page B2-496
AMAIR_EL1 RW
0x0000000000000000
64 B2.25 Auxiliary Memory Attribute Indirection Register, EL1
on page B2-394
MAIR_EL2 RW UNK 64 B2.78 Memory Attribute Indirection Register, EL2 on page B2-498
AMAIR_EL2 RW
0x0000000000000000
64 B2.26 Auxiliary Memory Attribute Indirection Register, EL2
on page B2-395
MAIR_EL3 RW UNK 64 B2.79 Memory Attribute Indirection Register, EL3 on page B2-499
B2 AArch64 system registers
B2.4 AArch64 Virtual memory control registers
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B2-366
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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