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ARM Cortex-A35 User Manual

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C11.34 ID Register 2
The TRCIDR2 characteristics are:
Purpose
Returns the maximum size of the following parameters in the trace unit:
Cycle counter.
Data value.
Data address.
VMID.
Context ID.
Instruction address.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
025 24 1415 10 9 5 4
IASIZE
29 28 20 19
CIDSIZEVMIDSIZEDASIZEDVSIZECCSIZERES0
Figure C11-33 TRCIDR2 bit assignments
[31:29]
Reserved, RES0.
CCSIZE, [28:25]
Size of the cycle counter in bits minus 12:
0x0 The cycle counter is 12 bits in length.
DVSIZE, [24:20]
Data value size in bytes:
0x00 Data value tracing is not implemented.
DASIZE, [19:15]
Data address size in bytes:
0x00 Data address tracing is not implemented.
VMIDSIZE, [14:10]
Virtual Machine ID size:
0x1 Virtual Machine ID is 8 bits.
CIDSIZE, [9:5]
Context ID size in bytes:
0x4 Maximum of 32-bit Context ID size.
IASIZE, [4:0]
Instruction address size in bytes:
C11 ETM registers
C11.34 ID Register 2
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-776
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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