ARM Cortex-A35 User Manual

B2.13 AArch64 Virtualization registers
The following table shows the virtualization registers in AArch64 state.
Bits[63:32] are reset to 0x00000000 for all 64-bit registers in this table.
Table B2-13 AArch64 virtualization registers
Name Type Reset Width Description
VPIDR_EL2 RW
0x411FD040
32 B2.104 Virtualization Processor ID Register, EL2 on page B2-555
VMPIDR_EL2 RW - 64
B2.103 Virtualization Multiprocessor ID Register, EL2 on page B2-554
The reset value is the value of the Multiprocessor Affinity Register.
SCTLR_EL2 RW
0x30C50838
32
B2.91 System Control Register, EL2 on page B2-529
The reset value depends on inputs, CFGTE and CFGEND. The value
shown assumes these signals are set to LOW.
ACTLR_EL2 RW
0x00000000
32 B2.20 Auxiliary Control Register, EL2 on page B2-387
HCR_EL2 RW
0x0000000000000002
64 B2.48 Hypervisor Configuration Register, EL2 on page B2-433
MDCR_EL2 RW
0x00000006
32 B2.80 Monitor Debug Configuration Register, EL2 on page B2-500
CPTR_EL2 RW
0x000033FF
32
B2.32 Architectural Feature Trap Register, EL2 on page B2-404
The reset value is 0x0000BFFF if Advanced SIMD and floating-point are
not implemented.
HSTR_EL2 RW
0x00000000
32 B2.50 Hyp System Trap Register, EL2 on page B2-441
HACR_EL2 RW
0x00000000
32 B2.47 Hyp Auxiliary Configuration Register, EL2 on page B2-432
TTBR0_EL2 RW UNK 64
Translation Table Base Address Register 0, EL3
See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A
architecture profile for more information.
TCR_EL2 RW UNK 32 B2.95 Translation Control Register, EL2 on page B2-540
VTTBR_EL2 RW UNK 64
Virtualization Translation Table Base Address Register, EL2
See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A
architecture profile.
VTCR_EL2 RW UNK 32 B2.105 Virtualization Translation Control Register, EL2 on page B2-556
DACR32_EL2 RW UNK 32 B2.39 Domain Access Control Register, EL2 on page B2-421
AFSR0_EL2 RW
0x00000000
32 B2.22 Auxiliary Fault Status Register 0, EL1, EL2, and EL3
on page B2-391
AFSR1_EL2 RW
0x00000000
32 B2.23 Auxiliary Fault Status Register 1, EL1, EL2, and EL3
on page B2-392
ESR_EL2 RW UNK 32 B2.42 Exception Syndrome Register, EL2 on page B2-425
FAR_EL2 RW UNK 64 B2.45 Fault Address Register, EL2 on page B2-430
HPFAR_EL2 RW UNK 64 B2.49 Hypervisor IPA Fault Address Register, EL2 on page B2-440
MAIR_EL2 RW UNK 64 B2.78 Memory Attribute Indirection Register, EL2 on page B2-498
B2 AArch64 system registers
B2.13 AArch64 Virtualization registers
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English