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ARM Cortex-A35 User Manual

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C11.54 Integration Mode Control Register
The TRCITCTRL characteristics are:
Purpose
Enables topology detection or integration testing, by putting the ETM trace unit into integration
mode.
Usage constraints
Arm recommends that you perform a debug reset after using integration mode.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 0
RES0
IME
1
Figure C11-53 TRCITCTRL bit assignments
[31:1]
Reserved, RES0.
IME, [0]
Integration mode enable bit. The possible values are:
0 The trace unit is not in integration mode.
1 The trace unit is in integration mode. This mode enables:
A debug agent to perform topology detection.
SoC test software to perform integration testing.
The TRCITCTRL can be accessed through the external debug interface, offset 0xF00.
C11 ETM registers
C11.54 Integration Mode Control Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-801
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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