EasyManuals Logo

ARM Cortex-A35 User Manual

Default Icon
894 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #555 background imageLoading...
Page #555 background image
B2.104 Virtualization Processor ID Register, EL2
The VPIDR_EL2 characteristics are:
Purpose
Holds the value of the Virtualization Processor ID. This is the value returned by Non-secure
EL1 reads of MIDR_EL1. See Figure B2-53 MIDR_EL1 bit assignments on page B2-510.
Usage constraints
This register is accessible as follows:
EL0 EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
- - - RW RW -
Configurations
VPIDR_EL2 is architecturally mapped to AArch32 register VPIDR. See B1.121 Virtualization
Processor ID Register on page B1-356.
Attributes
VPIDR_EL2 is a 32-bit register.
VPIDR_EL2 resets to the value of MIDR_EL1.
31
0
VPIDR
Figure B2-75 VPIDR_EL2 bit assignments
VPIDR, [31:0]
MIDR_EL1 value returned by Non-secure EL1 reads of the MIDR_EL1. The MIDR_EL1
description defines the subdivision of this value. See Figure B2-53 MIDR_EL1 bit assignments
on page B2-510.
To access the VPIDR_EL2:
MRS <Xt>, VPIDR_EL2 ; Read VPIDR_EL2 into Xt
MSR VPIDR_EL2, <Xt> ; Write Xt to VPIDR_EL2
Register access is encoded as follows:
Table B2-97 VPIDR_EL2 access encoding
op0 op1 CRn CRm op2
11 100 0000 0000 000
B2 AArch64 system registers
B2.104 Virtualization Processor ID Register, EL2
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B2-555
Non-Confidential

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ARM Cortex-A35 and is the answer not in the manual?

ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

Related product manuals