C1.4 External access permissions to debug registers
External access permission to the debug registers is subject to the conditions at the time of the access.
The following table describes the processor response to accesses to the debug registers.
Table C1-1 Conditions on external register access to debug registers
Name Condition Description
Off EDPRSR.PU is 0
The processor power domain is completely off or in a low-power state in
which the processor power domain registers cannot be accessed.
If debug power is off, then all external debug and memory-mapped register
accesses return an error.
DLK EDPRSR.DLK is 1 OS Double Lock is locked.
OSLK OSLSR_EL1.OSLK is 1 OS Lock is locked.
EDAD
AllowExternalDebugAccess() ==
FALSE
External debug access is disabled. When an error is returned because of an
EDAD condition code, the highest priority error condition,
EDPRSR.SDAD is set to 1. Otherwise SDAD is unchanged.
SLK Memory-mapped interface only Software lock is locked. For the external debug interface, ignore this
column.
Default - None of the conditions apply, normal access.
The following table shows an example of external register condition codes for access to a debug register.
To determine the access permission for the register, scan the columns from left to right. Stop at the first
column a condition is true, the entry gives the access permission of the register and scanning stops.
Table C1-2 Code example for the conditions on external register access to debug registers
Off DLK OSLK EDAD SLK Default
- - - - RO/WI RO
C1 Debug
C1.4 External access permissions to debug registers
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