ARM Cortex-A35 User Manual

B.1 Use of R15 by Instruction
If the use of R15 as a base register for a load or store is UNPREDICTABLE, the value used by the load or store
using R15 as a base register is the Program Counter (PC) with its usual offset and, in the case of T32
instructions, with the forced word alignment. In this case, if the instruction specifies Writeback, then the
load or store is performed without Writeback.
The Cortex‑A35 core does not implement a Read 0 or Ignore Write policy on UNPREDICTABLE use of R15
by instruction. Instead, the Cortex‑A35 core takes an UNDEFINED exception trap.
B AArch32 UNPREDICTABLE Behaviors
B.1 Use of R15 by Instruction
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English